65 6502 SBC FPGA
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Overview / Component 04
Input / Output

VIA 6522 & UART 6551 $8800 · $8810

The two classic I/O chips: a versatile interface adapter with timers and GPIO, and a serial port for terminal and upload.

VIA 6522 — Versatile Interface Adapter

The VIA provides programmable timers, parallel GPIO ports and interrupt logic. In the SBC it serves as a timer (Timer 1 raises periodic IRQs) and drives board LEDs through Port B.

VIA window
$8800–$880F (16 B)
UART window
$8810–$8813 (4 B)
Serial rate
115200 8N1
IRQ
VIA · UART · VIC (OR)

UART 6551 — serial port

The UART implements the full transmit and receive logic with status registers and a receive interrupt. It is the main link to the PC: the EhBASIC terminal, ROM uploads and diagnostic output all run over it. On the Tang Primer 20K it is driven through the CH340 USB-serial bridge at 115200 8N1.

Verified functions (GHDL): status read, TX write, RX read, RDRF clearing, overrun detection, programmed reset and RX IRQ behavior.

Keyboard through the serial bridge

A peculiarity of the FPGA implementation: a PS/2 keyboard attaches to a PMOD, and its keystrokes are injected directly into the serial receive path. To EhBASIC this looks like ordinary serial input — it never has to tell UART and keyboard apart. Local typing on the HDMI screen works without a separate keyboard controller.

How the interrupts combine

The IRQ lines from VIA, UART and VIC are OR-combined and routed together to the CPU:

cpu_irq_n = NOT (via_irq OR uart_irq OR vic_irq)

The 6502 then branches through the interrupt vector at $FFFE–$FFFF into the appropriate handler.